Agrani Labs 9 Jul 2026
Compute Core Team
VLSIDesign
Agrani Labs 9 Jul 2026
Hardware Design Team
AI / Machine LearningVLSISemiconductor Design PyTorchRTL DesignDFT
Vicharak Date not provided
Surat, Gujarat
VLSISemiconductor Design PythonDFTPhysical Design
Edveon Technologies Date not provided
Siruseri, Chennai · Full Time
Backend EngineeringVLSISemiconductor Design PythonC++Java
Constelli Signals Date not provided
VLSI CC++MATLAB
Constelli Signals Date not provided
Embedded SystemsVLSIFPGA PythonCC++
Edveon Technologies Date not provided
Siruseri, Chennai · Full Time
VLSI SystemVerilog
Pixxel Space 20 Aug 2026
Payload Avionics · Bengaluru, Karnataka, India · Full-Time
VLSI PythonC++MATLAB
Tessolve 19 Aug 2026
Digital · Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Probation
Embedded SystemsVLSISemiconductor Design MATLABEmbedded CARM
Ananant Systems Date not provided
Bengaluru
VLSI RTL Design
Edveon Technologies Date not provided
Chennai / USA
VLSI VerilogSystemVerilogRTL Design
Tessolve 10 Aug 2026
Digital · ORR, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India, Sarjapur Road, Bengaluru, Karnataka, India, Electronic City, Bengaluru, Karnataka, India · Regular Employee - Probation
VLSI MATLABARMCAN/LIN
QNu Labs 27 Jul 2026
Bangalore · Full-time
VLSIFPGADesign FPGA
Moschip 24 Jun 2026
ASIC Design · Bangalore, Hyderabad · Full Time
VLSI VerilogRTL DesignVerification
Moschip 18 Jun 2026
ASIC Design · Bangalore, Hyderabad · Full Time
VLSI VerilogRTL DesignVerification
Moschip 18 Jun 2026
ASIC Design · Bangalore, Hyderabad · Full Time
VLSI VerilogRTL DesignVerification
Moschip 16 Jun 2026
ASIC Design · Bangalore, Hyderabad · Full Time
VLSI VerilogRTL DesignVerification
Tessolve 17 May 2026
Digital · Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems Physical DesignCadenceSynopsys
Tessolve 17 May 2026
Digital · Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems Physical DesignCadenceSynopsys
Tessolve 14 May 2026
Digital · Noida, Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Guindy, Chennai, Tamil Nadu, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 14 May 2026
Digital · Electronic City, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India, Jubilee Hills, Hyderabad, Telangana, India · Regular Employee - Confirmed
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 13 May 2026
Digital · Noida, Noida, Uttar Pradesh, India, Electronic City, Bengaluru, Karnataka, India, Jubilee Hills, Hyderabad, Telangana, India, ORR, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems PythonSystemVerilogCAN/LIN
Tessolve 11 May 2026
Digital · Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Confirmed
Backend EngineeringFrontend EngineeringEmbedded Systems PythonPhysical DesignCadence
Tessolve 7 Apr 2026
Digital · Electronic City, Bengaluru, Karnataka, India, Sarjapur Road, Bengaluru, Karnataka, India, Whitefield, Bengaluru, Karnataka, India · Regular Employee-Probation (IN)
VLSI PythonRTL DesignSoC Design
Tessolve 20 Jan 2026
Digital (TSI_VLSI_DIG) · Whitefield, Bengaluru, Karnataka, India, Guindy, Chennai, Tamil Nadu, India, Jubilee Hills, Hyderabad, Telangana, India · Regular Employee - Confirmed
Frontend EngineeringEmbedded SystemsVLSI Embedded CDFTHardware Design
Moschip 13 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
Moschip 8 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
Moschip 8 Jan 2026
SES · Bangalore, Hyderabad · Full Time
VLSI CC++Verilog
Tessolve 16 Dec 2025
Digital · Sarjapur Road, Bengaluru, Karnataka, India · Regular Employee - Probation
Backend EngineeringFrontend EngineeringEmbedded Systems Physical DesignAvionics / DO-178C
UNMANND 30 Aug 2025
Bengaluru, Karnataka · Full time
VLSI CC++Verilog
